Bio

Harish Kumar Chencharla Raghavendra is an accomplished software engineer with over 20 years of expertise in software architecture, design, and development across Datacom, Optical, and Wireless networking domains. He is currently a Software Engineer at Arista Networks in Santa Clara, California, where he works on advanced networking solutions such as tunnels in the Arista Extensible Operating System (EOS) and Data Analyzer Monitoring Fabric (DMF). His work involves developing and integrating features like tunnel interfaces, decapsulation groups, next-hop groups, and network packet broker technologies into high‑performance platforms. Over his career, Harish has contributed to the design and implementation of Layer‑2, Layer‑3, MPLS‑TP, and Segment Routing (SR‑MPLS & SRv6) software, as well as SDH/SONET optical switch and UMTS control software. His extensive experience spans leading technology organizations, including Big Switch Networks, Cavium, Cisco Systems, HCL America, HCL Technologies, Aricent (formerly FutureSoft), and Engineering Technologies Associates, where he has consistently delivered cutting-edge networking features and core infrastructure enhancements. Harish’s technical skill set includes expertise in distributed AI networks, cloud networking, network monitoring, and a wide range of protocol stacks and operating systems such as UNIX, Linux, VxWorks, and NetBSD. He is highly proficient in C, C++, and scripting languages like Python, Perl, and TCL/TK. He has also worked extensively with industry‑leading chipsets from Broadcom, Cisco, and XPlaint. Harish holds a Bachelor of Technology in Computer Science and Engineering from Jawaharlal Nehru Technological University, Hyderabad. Throughout his career, he has earned multiple certifications in MPLS, VxWorks, and advanced networking fundamentals, and has served as a certified trainer in these areas.